Efficient LDPC Encoder Design for IoT-Type Devices

Low-density parity-check (LDPC) codes are known to be one of the best error-correction coding (ECC) schemes in terms correction performance. They have been utilized many advanced data communication standards for which codecs typically implemented custom integrated circuits (ICs). In this paper, we present a research work that shows LDPC scheme can also applied system characterized by highly limited computational resources. We microcontroller-based application an efficient encoding algorithm with usage memory resources code-parity-check matrix and storage results auxiliary computations. The developed implementation is intended IoT-type system, low-complexity network node device encodes messages transmitted gateway. how classic Richardson–Urbanke decomposed QC-LDPC subclass into cyclic shifts GF(2) additions, directly corresponding CPU instructions. experimental show significant gain decoding timing proposed method comparison direct parity check representation. provide comparisons other block (RS BCH) showing requirements not greater than standard codes, while time reduced, enables energy consumption reduction. At same time, performance mentioned codes.